The invention relates to a logic memory circuit integrated on a semiconductor body and having at least one memory matrix of erasable programmable memory cells, which is controlled by a control unit constituted by transistors of the insulated gate field type (MOST's).
Programmable non-volatile memories of the EPROM (Erasable Programmable Read-Only Memory) and of the EEPROM (Electrically Erasable Programmable Read-Only Memory) type have recently become increasingly popular because they have the advantage of programming, erasing and reprogramming in a simple manner the memory unit in an electrical computer or microprocessor, as a result of which the flexibility for introducing new programs is considerably increased. Such an EPROM or EEPROM is then generally integrated on a semiconductor body, mostly together with further arithmetic and control units which forms part of the computer or microprocessor.
The programming of an EPROM or an EEPROM normally requires a considerably higher operating voltage than the voltage at which the remaining semiconductor elements on the semiconductor body are operated, i.e. a voltage immediately below the breakdown voltage of the semiconductor junctions operated in reverse direction (junction breakdown) of the semiconductor zones of which the EPROM or the EEPROM is composed. Background information on operating and programming voltages in an EEROM is contained in the article "Low-Voltage Single Supply CMOS Electrically Erasable Read-Only Memory", IEEE TRANSLATIONS ON ELECTRON DEVICES, Vol. ED-27, No. 7, July 1980.
In order to adapt the said remaining semiconductor elements, more particularly those required for selecting those cells of the memory to which the correct programming voltage has to be supplied, to the programming voltage of the memory, use could be made of field effect transistors having a comparatively large channel length. In fact, the larger the channel length, the higher becomes the source/drain breakdown voltage. Field effect transistors having a channel length of 10 .mu.m are capable of withstanding, for example, a voltage between source electrode and drain electrode of 20 V, while with a channel length of 2.5 .mu.m this voltage may fall below 10 V. The use of field effect transistors having a large channel length unfavorably influences the switching speed, however, which is undesirable.